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<title>Term Definition: 设计机制（design mechanism）</title>
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<td class="pageTitle" nowrap="true">Term Definition: 设计机制（design mechanism）</td><td width="100%">
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<div class="sectionHeading">Main Description</div>
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<td class="sectionTableSingleCell">在设计流程中，以及完成设计的细节期间所使用的一种<i><a class="elementLink" href="./../../../rup/guidances/termdefinitions/architectural_mechanism_8730DF1F.html" guid="_x7JZQ9nmEdmO6L4XMImrsA">架构机制（architectural mechanism）</a></i>。它们与关联的<i><a class="elementLinkWithUserText" href="./../../../rup/guidances/termdefinitions/analysis_mechanism_4DAA970A.html" guid="_x6stV9nmEdmO6L4XMImrsA">分析机制</a></i>有关，它们是这些分析机制的进一步改进，而且它们还可以绑定一种或多种架构和设计模式。分析机制和设计机制之间在规模上不一定要存在差别，因而以下说法是可能成立的，即在分析层次上的永久性机制和在设计层次上的永久性机制是处于不同改进层次上的同一事物。设计机制假定实现环境的一些细节，但它不属于特定的实现（如<i><a class="elementLink" href="./../../../rup/guidances/termdefinitions/implementation_mechanism_59389269.html" guid="_yKfc2dnmEdmO6L4XMImrsA">实现机制（implementation mechanism）</a></i>）。例如，进程间通信的分析机制可以通过以下若干进程间通信（IPC）的设计机制来进一步改进：共享的内存、类似函数调用的 IPC、基于信号量的 IPC
等。每一种设计机制都具有确定的优缺点，根据使用机制的对象的特征来决定选择何种设计机制。</td>
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